1. Field of the Invention
This invention is related to the field of voltage regulators, and particularly to a voltage regulator employed within a phase locked loop (PLL).
2. Description of the Related Art
Voltage regulators are used in a variety of systems to provide a regulated voltage to other circuits in the system. Generally, it is desirable to provide a stable regulated voltage in the face of a wide variety of loads, operating frequencies, etc.
A measure of the effectiveness of a voltage regulator is its power supply rejection ratio (PSRR), which measures the amount of noise present on the power supply to the voltage regulator which is transmitted to the regulated voltage. A high PSRR is indicative of a low amount of transmission of noise, and a low PSRR is indicative of a high amount of noise transmission. A high PSRR, particularly across a wide range of operating frequencies of the devices being supplied by the voltage regulator, is difficult to achieve.
For example, voltage regulators have been used in the past to power PLL circuitry. However, PSRRs of voltage regulators used in PLLs have been limited. For example, PSRRs greater than 25 dB may not been achieved in voltage regulators used in PLLS.
A voltage regulator is provided which may include one or more features for generating high PSRR. For example, source follower devices may be included in the voltage regulator for providing current sources for the output voltage nodes. The source followers may be sensitive to power supply noise at the gate terminal. Filters are included on the gate terminals to filter the power supply noise, thus reducing the noise at the gate terminals. As another example, the voltage regulator may employ current sources on the output voltage nodes which produce current inversely proportional to the current drawn by the load. Current variation on the output node may be reduced, which may ease the regulation of the voltage.
In one embodiment, the voltage regulator may include a power control circuit used to provide overvoltage protection during power up. For example, the above mentioned source followers may experience an overvoltage condition during power up since the gate terminals are charged through an RC time constant while the drain terminal may rapidly be powered to the power supply voltage. The power control circuit provides a voltage on the gate terminal during power up, and ceases providing the voltage after a time interval so that the circuit may operate.
While the above circuits are illustrated within a voltage regulator, they may also be used in other contexts, as desired.
Broadly speaking, a circuit is contemplated. The circuit includes a first N-type transistor having a first terminal coupled to a power supply, a second terminal and a first gate terminal. The circuit further includes a filter coupled between the power supply and the first gate terminal.
Additionally, a circuit is contemplated comprising a first transistor having a first terminal coupled to a power supply, a second terminal, and a first gate terminal; and a power control circuit. The power control circuit is configured, during a time period commencing at power up of the circuit, to supply a voltage to one of the second terminal and the first gate terminal to prevent an overvoltage condition on the first transistor. Additionally, the power control circuit is configured, at a termination of the time period, to cease supplying the voltage.
Moreover, a circuit is contemplated. The circuit includes an operational amplifier (op amp); a first transistor having a gate terminal coupled to an output of the op amp and having a first terminal and a second terminal; and a first current source. The first terminal is an output to which a load is couplable, the load being capable of drawing a variable current from the first terminal during operation. The first current source coupled to the first terminal and draws a first current from the first terminal which is inversely proportional to the current drawn by the load during operation.